Answer:
6.6 times faster considering I-cache
Explanation:
<em>Given data </em>:
CPI = 1
Data accesses ( loads and stores ) = 40% of instructions
Miss penalty = 200 clock cycles
Miss rate = 2% for I-cache , 5% for D-cache
<u>Determine how much faster the computer will be if all instructions were Cache hits </u>
In this condition the memory stall = 0
hence: CPU ideal time = ( Ic * CP1 + memory stall ) * clock cycle time --- ( 1 )
= ( Ic * 1 + 0 ) * clock cycle time
<em>Note : Memory stall = Ic * ( 1 + load fraction ) * miss rate * miss penalty --- ( 2)</em>
back to equation 1
Memory stall ( for I-cache ) = Ic * ( 1 + 40% ) * 2% * 200
= 5.6 Ic
Input value into equation 1
CPU ideal time = Ic * 1 + 5.6Ic * clock cycle time
= ( 6.6 Ic ) * clock cycle time
To determine how much faster we take the ratio of the CPU ideal time
= 6.6 Ic * clock cycle time / 1 Ic * clock cycle time
= 6.6 times faster
