You need to design a clock that will oscillate at 10 MHz and will spend 75% of each cycle in the high state. You will be using a

Question

uysha [10]

2 years ago

6

You need to design a clock that will oscillate at 10 MHz and will spend 75% of each cycle in the high state. You will be using a

500 pF capacitor. What values do you need to specify for R1 and R2

Physics

1 answer:

Svetllana [295] · Answer 1 · 2023-12-16T09:59:19+03:00

Answer:

Hello your question has some missing parts and the required diagram attached below is the missing part and the diagram

Digital circuits require actions to take place at precise times, so they are controlled by a clock that generates a steady sequence of rectangular voltage pulses. One of the most widely

used integrated circuits for creating clock pulses is called a 555 timer. shows how the timer’s output pulses, oscillating between 0 V and 5 V, are controlled with two resistors and a capacitor. The circuit manufacturer tells users that TH, the time the clock output spends in the high (5V) state, is TH =(R1 + R2)*C*ln(2). Similarly, the time spent in the low (0 V) state is TL = R2*C*ln(2). Design a clock that will oscillate at 10 MHz and will spend 75% of each cycle in the high state. You will be using a 500 pF capacitor. What values do you need to specify for R1 and R2?

ANSWER : R1 = 144.3Ω, R2 = 72.2 Ω

Explanation:

Frequency = 10 MHz

Time period = 1 / F = 0.1 u s

Duty cycle = 75% = 0.75

Duty cycle can be represented as : Ton / T

Also: Ton = Th = 0.75 * 0.1 u s = 75 n s

TL = T - Th = 100 ns - 75 n s = 25 n s

To find the value of R2 we use the equation for time spent in the low (0 V) state

TL = R2*C*ln(2)

hence R2 = TL / ( C * In 2 )

c = 500 pF